Event language
UI language
RISC-V is an open-source standard instruction set architecture (ISA) that is managed by the non-profit RISC-V Foundation, and VexRiscv implements a configurable RISC-V core along with memory, a range of I/O, and interfaces for embedding user functions. In this talk, running FreeRTOS on VexRiscv empowers the creation of entire systems with full customizations. The internals of FreeRTOS kernel will be discussed including architecture-specific porting, interrupt handling, etc.
